3.18.31 NDS32 Options
These options are defined for NDS32 implementations:
- Generate code in big-endian mode.
- Generate code in little-endian mode.
- Use reduced-set registers for register allocation.
- Use full-set registers for register allocation.
- Generate conditional move instructions.
- Do not generate conditional move instructions.
- Generate performance extension instructions.
- Do not generate performance extension instructions.
- Generate v3 push25/pop25 instructions.
- Do not generate v3 push25/pop25 instructions.
- Generate 16-bit instructions.
- Do not generate 16-bit instructions.
- Specify the size of each interrupt vector, which must be 4 or 16.
- Specify the size of each cache block,
which must be a power of 2 between 4 and 512.
- Specify the name of the target architecture.
- Set the code model to one of
- All the data and read-only data segments must be within 512KB addressing space.
The text segment must be within 16MB addressing space.
- The data segment must be within 512KB while the read-only data segment can be
within 4GB addressing space. The text segment should be still within 16MB
- All the text and data segments can be within 4GB addressing space.
- Enable constructor/destructor feature.
- Guide linker to relax instructions.